374 lines
13 KiB
C++
374 lines
13 KiB
C++
#include "global.h"
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#include "VectorHelper.h"
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#include "RageUtil.h"
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#ifdef USE_VEC
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#include <vecLib/vecLib.h>
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#ifndef __VECLIBTYPES__
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// Copy this from the header since it isn't in the 10.2.8 sdk
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typedef vector unsigned char vUInt8;
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typedef vector signed char vSInt8;
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typedef vector unsigned short vUInt16;
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typedef vector signed short vSInt16;
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typedef vector unsigned int vUInt32;
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typedef vector signed int vSInt32;
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typedef vector float vFloat;
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typedef vector bool int vBool32;
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#endif
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bool Vector::CheckForVector()
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{
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long cpuAttributes;
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OSErr err = Gestalt( gestaltPowerPCProcessorFeatures, &cpuAttributes );
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return err == noErr && ( cpuAttributes & (1 << gestaltPowerPCHasVectorInstructions) );
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}
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/* for( size_t pos = 0; pos < size; ++pos )
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* dest[pos] += src[pos] * volume;
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*/
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void Vector::FastSoundWrite( int32_t *dest, const int16_t *src, unsigned size, short volume )
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{
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if( size == 0 )
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return;
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ASSERT_M( (unsigned(dest) &0xF) == 0, ssprintf("dest = %p", dest) );
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/* We want to splat the volume across a vector but it is unlikely to be aligned in
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* the same location every time so we are going to load it into some offset in
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* the vector, permute it to the first word and splat it. */
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vUInt8 mask = vec_lvsl( 0, &volume );
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vSInt16 vol = vec_lde( 0, &volume );
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vol = vec_splat( vec_perm(vol, vol, mask), 0 );
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/* To handle src being unaligned we're going to load an initial vector and each
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* iteration of the loop, we'll load 15 bytes past the first to pick up the next
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* vector of data (note that if we can load one element of a vector, it's always
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* safe to load the whole vector) unless src is actually aligned in which case
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* we'll end up with the same vector. To handle that, be tricky with the
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* permutation mask to load from LSQ otherwise every iteration but the first we
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* will be loading the wrong data. */
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vSInt16 MSQ = vec_ld( 0, src );
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vSInt16 LSQ;
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mask = vec_add( vec_lvsl(15, src), vec_splat_u8(1) );
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while( size >= 32 )
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{
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vSInt16 data1, data2, data3, data4;
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LSQ = vec_ld( 15, src );
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data1 = vec_perm( MSQ, LSQ, mask );
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MSQ = vec_ld( 31, src );
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data2 = vec_perm( LSQ, MSQ, mask ); // Reverse MSQ and LSQ.
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LSQ = vec_ld( 47, src );
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data3 = vec_perm( MSQ, LSQ, mask );
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MSQ = vec_ld( 63, src );
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data4 = vec_perm( LSQ, MSQ, mask ); // Reversed.
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// Load early, let gcc schedule them where it wants.
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vSInt32 result1 = vec_ld( 0, dest );
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vSInt32 result2 = vec_ld( 16, dest );
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vSInt32 result3 = vec_ld( 32, dest );
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vSInt32 result4 = vec_ld( 48, dest );
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vSInt32 result5 = vec_ld( 64, dest );
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vSInt32 result6 = vec_ld( 80, dest );
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vSInt32 result7 = vec_ld( 96, dest );
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vSInt32 result8 = vec_ld( 112, dest );
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vSInt32 even1 = vec_mule( data1, vol );
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vSInt32 odd1 = vec_mulo( data1, vol );
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vSInt32 even2 = vec_mule( data2, vol );
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vSInt32 odd2 = vec_mulo( data2, vol );
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vSInt32 even3 = vec_mule( data3, vol );
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vSInt32 odd3 = vec_mulo( data3, vol );
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vSInt32 even4 = vec_mule( data4, vol );
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vSInt32 odd4 = vec_mulo( data4, vol );
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vSInt32 first = vec_mergeh( even1, odd1 );
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vSInt32 second = vec_mergel( even1, odd1 );
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vSInt32 third = vec_mergeh( even2, odd2 );
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vSInt32 fourth = vec_mergel( even2, odd2 );
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vSInt32 fifth = vec_mergeh( even3, odd3 );
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vSInt32 sixth = vec_mergel( even3, odd3 );
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vSInt32 seventh = vec_mergeh( even4, odd4 );
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vSInt32 eighth = vec_mergel( even4, odd4 );
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result1 = vec_add( result1, first );
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result2 = vec_add( result2, second );
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result3 = vec_add( result3, third );
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result4 = vec_add( result4, fourth );
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result5 = vec_add( result5, fifth );
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result6 = vec_add( result6, sixth );
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result7 = vec_add( result7, seventh );
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result8 = vec_add( result8, eighth );
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vec_st( result1, 0, dest );
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vec_st( result2, 16, dest );
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vec_st( result3, 32, dest );
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vec_st( result4, 48, dest );
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vec_st( result5, 64, dest );
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vec_st( result6, 80, dest );
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vec_st( result7, 96, dest );
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vec_st( result8, 112, dest );
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dest += 32;
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src += 32;
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size -= 32;
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}
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/* This completely baffles gcc's loop unrolling. If I make it > 7 instead,
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* then gcc produces 4 identical copies of the loop without scheduling them
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* in a sane manner (hence the manual unrolling above) but this loop will
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* never be executed more than 3 times so that code will never be used.
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* This produces code the way gcc _should_ do it by unrolling and scheduling
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* and then producing the rolled version. */
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while( size & ~0x7 )
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{
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// Load next 16 bytes.
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LSQ = vec_ld( 15, src );
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vSInt16 data = vec_perm( MSQ, LSQ, mask );
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vSInt32 result1 = vec_ld( 0, dest );
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vSInt32 result2 = vec_ld( 16, dest );
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/* Multiply the even 2-byte elements in data with those in vol to get
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* 4-byte elements. Do the same with the odd elements then merge both
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* high and low halves of the vectors into two new 4-element, 4-byte
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* vectors. In this way the combined vector <first,second> contains
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* the 8 products in the correct order. */
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vSInt32 even = vec_mule( data, vol );
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vSInt32 odd = vec_mulo( data, vol );
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vSInt32 first = vec_mergeh( even, odd );
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vSInt32 second = vec_mergel( even, odd );
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vec_st( vec_add(result1, first), 0, dest );
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vec_st( vec_add(result2, second), 16, dest );
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dest += 8;
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src += 8;
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size -= 8;
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MSQ = LSQ;
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}
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if( size )
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{
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/* There is more data left but fewer than 14 bytes (7 2-byte elements)
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* to be written. Handle it exactly the same as above but be careful
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* to only store size 4-byte products. */
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LSQ = vec_ld( 15, src );
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vSInt16 data = vec_perm( MSQ, LSQ, mask );
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vSInt32 result1 = vec_ld( 0, dest );
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vSInt32 result2 = vec_ld( 16, dest );
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vSInt32 even = vec_mule( data, vol );
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vSInt32 odd = vec_mulo( data, vol );
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vSInt32 first = vec_mergeh( even, odd );
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vSInt32 second = vec_mergel( even, odd );
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result1 = vec_add( result1, first );
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result2 = vec_add( result2, second );
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if( size >= 4 )
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{
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/* We can store the first 4 in one store instruction. Store
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* the size-4 others one at a time. */
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vec_st( result1, 0, dest );
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dest += 4;
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size -= 4;
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while( size-- )
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vec_ste( result2, 0, dest++ );
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}
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else
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{
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/* We have fewer than 4 so store them one at a time. */
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while( size-- )
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vec_ste( result1, 0, dest++ );
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}
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}
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}
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/* for( size_t pos = 0; pos < size; ++pos )
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* dest[pos] = clamp( src[pos]/256, -32768, 32767 );
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*/
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void Vector::FastSoundRead( int16_t *dest, const int32_t *src, unsigned size )
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{
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ASSERT_M( (unsigned(dest) & 0xF) == 0, ssprintf("dest = %p", dest) );
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ASSERT_M( (unsigned(src) & 0xF) == 0, ssprintf("src = %p", src) );
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vSInt32 zero = (vSInt32)( 0 );
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vUInt32 shift = (vUInt32)( 8 );
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/* This is tricky. We need to divide signed 4-byte integers by 256 and stuff
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* them into 2-byte integers. First, find the elements which are negative
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* by comparing to zero (those less than zero will have each bit in the
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* 32-bit element set to 1 and those at least zero will have them all set
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* to 0). Take the absolute value (it actually subtracts the vector from zero
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* and computes the max to do that), shift right by 8 bits, use the masks
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* to get vectors containing only those elements which were negative and
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* subtract twice. Use saturated arithmatic to deal with overflow. Lastly,
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* pack the two vectors into signed 2-byte integers (again saturated). */
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while( size >= 32 )
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{
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// Use LRU load which marks the address as LRU. Does nothing on the G5.
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vSInt32 first = vec_ldl( 0, src );
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vSInt32 second = vec_ldl( 16, src );
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vSInt32 third = vec_ldl( 32, src );
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vSInt32 fourth = vec_ldl( 48, src );
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vSInt32 fifth = vec_ldl( 64, src );
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vSInt32 sixth = vec_ldl( 80, src );
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vSInt32 seventh = vec_ldl( 96, src );
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vSInt32 eighth = vec_ldl( 112, src );
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vBool32 b1 = vec_cmplt( first, zero );
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vBool32 b2 = vec_cmplt( second, zero );
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vBool32 b3 = vec_cmplt( third, zero );
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vBool32 b4 = vec_cmplt( fourth, zero );
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vBool32 b5 = vec_cmplt( fifth, zero );
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vBool32 b6 = vec_cmplt( sixth, zero );
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vBool32 b7 = vec_cmplt( seventh, zero );
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vBool32 b8 = vec_cmplt( eighth, zero );
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first = vec_sr( vec_abss(first), shift );
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second = vec_sr( vec_abss(second), shift );
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third = vec_sr( vec_abss(third), shift );
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fourth = vec_sr( vec_abss(fourth), shift );
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fifth = vec_sr( vec_abss(fifth), shift );
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sixth = vec_sr( vec_abss(sixth), shift );
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seventh = vec_sr( vec_abss(seventh), shift );
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eighth = vec_sr( vec_abss(eighth), shift );
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vSInt32 temp1 = vec_and( first, (vSInt32)b1 );
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vSInt32 temp2 = vec_and( second, (vSInt32)b2 );
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vSInt32 temp3 = vec_and( third, (vSInt32)b3 );
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vSInt32 temp4 = vec_and( fourth, (vSInt32)b4 );
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vSInt32 temp5 = vec_and( fifth, (vSInt32)b5 );
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vSInt32 temp6 = vec_and( sixth, (vSInt32)b6 );
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vSInt32 temp7 = vec_and( seventh, (vSInt32)b7 );
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vSInt32 temp8 = vec_and( eighth, (vSInt32)b8 );
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first = vec_subs( vec_sub(first, temp1), temp1 );
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second = vec_subs( vec_sub(second, temp2), temp2 );
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third = vec_subs( vec_sub(third, temp3), temp3 );
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fourth = vec_subs( vec_sub(fourth, temp4), temp4 );
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fifth = vec_subs( vec_sub(fifth, temp5), temp5 );
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sixth = vec_subs( vec_sub(sixth, temp6), temp6 );
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seventh = vec_subs( vec_sub(seventh, temp7), temp7 );
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eighth = vec_subs( vec_sub(eighth, temp8), temp8 );
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vec_st( vec_packs(first, second), 0, dest );
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vec_st( vec_packs(third, fourth), 16, dest );
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vec_st( vec_packs(fifth, sixth), 32, dest );
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vec_st( vec_packs(seventh, eighth), 48, dest );
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dest += 32;
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src += 32;
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size -= 32;
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}
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// Befuddle optimizer as above.
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while( size & ~0x7 )
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{
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vSInt32 first = vec_ldl( 0, src );
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vSInt32 second = vec_ldl( 16, src );
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vBool32 b1 = vec_cmplt( first, zero );
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vBool32 b2 = vec_cmplt( second, zero );
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first = vec_abss( first );
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second = vec_abss( second );
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first = vec_sr( first, shift );
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second = vec_sr( second, shift );
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vSInt32 temp1 = vec_and( first, (vSInt32)b1 );
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vSInt32 temp2 = vec_and( second, (vSInt32) b2 );
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first = vec_subs( first, temp1 );
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second = vec_subs( second, temp2 );
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first = vec_subs( first, temp1 );
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second = vec_sub( second, temp2 );
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vec_st( vec_packs(first, second), 0, dest );
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dest += 8;
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src += 8;
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size -= 8;
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}
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if( size )
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{
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// Deal with the remaining samples but be careful while storing as above.
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vSInt32 first = vec_ldl( 0, src );
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vSInt32 second = vec_ldl( 16, src );
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vBool32 b1 = vec_cmplt( first, zero );
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vBool32 b2 = vec_cmplt( second, zero );
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first = vec_abss( first );
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second = vec_abss( second );
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first = vec_sr( first, shift );
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second = vec_sr( second, shift );
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vSInt32 temp1 = vec_and( first, (vSInt32)b1 );
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vSInt32 temp2 = vec_and( second, (vSInt32) b2 );
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first = vec_subs( first, temp1 );
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second = vec_subs( second, temp2 );
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first = vec_subs( first, temp1 );
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second = vec_sub( second, temp2 );
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vSInt16 result = vec_packs( first, second );
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while( size-- )
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vec_ste( result, 0, dest++ );
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}
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}
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/* for( size_t pos = 0; pos < size; ++pos )
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* dest[pos] = SCALE( float(src[pos]), -32768*256, 32767*256, -1.0f, 1.0f );
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*/
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void Vector::FastSoundRead( float *dest, const int32_t *src, unsigned size )
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{
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ASSERT_M( (unsigned(dest) &0xF) == 0, ssprintf("dest = %p", dest) );
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ASSERT_M( (unsigned(src) & 0xF) == 0, ssprintf("src = %p", src) );
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vFloat scale = (vFloat) ( 32767.5f );
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vSInt32 l1 = (vSInt32) ( -8388608 );
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vFloat l2 = (vFloat) ( -1.0f );
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while( size > 3 )
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{
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/* By far the simplest of these, we need only perform the scale
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* operation which amounts to subtracting l1, converting to a float,
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* multiplying by a constant, and adding l1. We can multiply and add
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* in one instruction. */
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vFloat result = vec_ctf( vec_subs(vec_ldl(0, src), l1), 8 );
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vec_st( vec_madd(result, scale, l2), 0, dest );
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dest += 4;
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src += 4;
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size -= 4;
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}
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if( size )
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{
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// Deal with the remaining samples but be careful while storing as above.
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vFloat result = vec_madd( vec_ctf(vec_subs(vec_ldl(0, src), l1), 8), scale, l2 );
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while( size-- )
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vec_ste( result, 0, dest++ );
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}
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}
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#endif
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/*
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* (c) 2006 Steve Checkoway
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, and/or sell copies of the Software, and to permit persons to
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* whom the Software is furnished to do so, provided that the above
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* copyright notice(s) and this permission notice appear in all copies of
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* the Software and that both the above copyright notice(s) and this
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* permission notice appear in supporting documentation.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF
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* THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS
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* INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT
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* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
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* OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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